M08 / RK2108D [chip]: Rockchip RK2108 product page and RK2108D datasheet V1.1 — Cortex-M4F up to 400 MHz, Cadence Tensilica HiFi3 DSP with 4 × 24-bit MAC or dual 32-bit MAC, three VLIW slots and a two-way SIMD vector FPU, 1 MB shared SRAM plus 512 KB DTCM, built-in 2-channel audio ADC, PDM and I2S interfaces, MCU/SPI LCD and MIPI LCD on the D variant, 4 × PWM, RT-Thread, no video decoder. RK3506B [chip]: Rockchip RK3506 product page and RK3506B datasheet V1.1 / V1.4 — triple-core Cortex-A7 at up to 1.5 GHz plus Cortex-M0, 128 KB L2, PDM RX 8 channels, SAI ports as listed, audio ADC 1 channel, audio DSM 2 channels, ASRC 4 channels × 2, PWM × 12, 16-bit DDR2/DDR3/DDR3L, 2D engine at 1280×800@60 with RGB / MCU / 2-lane MIPI output, WBBGA333L 13.3 × 11.3 mm at 0.562 mm pitch, no NPU. 720p@30 H.264/MJPEG software decode and the absence of a VPU are as published in module vendor specifications (Firefly ROC-RK3506B, MYIR MYC-YR3506, Wanxiang Aoke RK3506), where the VPU row is a dash. RK3572 [chip]: Rockchip launch material dated 2026-05-08 and the RK3572 datasheet V1.1 summary — 8 nm, 2 × Cortex-A73 @2.2 GHz + 6 × Cortex-A53 @2.1 GHz, Mali-G310V2 MC1 with Vulkan 1.4, 4 TOPS INT8 NPU, LPDDR4/4X/5/5X to 16 GB, hardware decode of H.265/VP9/AV1/AVS2 to 8K@30 or 4K@120 and H.264 to 4K@60, dual display 4K@60 + 2048×1080@60, 8-channel PDM with 6 × SAI, 16 × PWM, FCCSP550L. Model latency figures quoted in the RK3572 section [vendor benchmark]: 0.6B class at about 190 ms TTFT and 23 tokens/s, 1.7B class at about 360 ms and 9 tokens/s, measured by the vendor on a reference tablet — quoted to size the tier, not as a product guarantee. Array figures [physics]: c = 343 m/s, usable band from c/D to c/2d with D = (N−1)d. Nothing on this page is a measurement from our own unit, and no acoustic performance figure is claimed.
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